STA Engineer - Static Timing Analysis Engineer

• Synthesis / Sign-off STA
• Take responsibilities of creating SDC for the complex SoC.
• Take responsibilities of timing analysis with customer
• Take responsibilities of planing low-power structure and review flow (CPF/UPF)
• Support back-end team in post-layout timing closures
• Support project team in central tech-library management
• Run EDA-Tool and Company's in-house design kit.

• From 2-year experience
• Familiar with ASIC Flow
• Understand SoC IO Structure and experience of integrating 3rd party IP.
• Understand physical synthesis flow.
• English communication (prefer candidate with TOEIC 730-855 or relevant)

BENEFITS:

• Competitive annual salary package: performance bonus, 13-month salary, salary annual increase
• Insurance full salary
• PVI Premium Health care package applied for employee since Probation
• PVI Premium Health care package applied for Family members after Probation
• Free motorbike parking
• Monthly meal & transportation allowances
• Annual health check
• Company trip, voucher/gifts on Birthday & Special occasions.
• Dynamic enviroment with talented people